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phase-lock-loop (PLL)
Isang circuitry sa teknolohiya ng telekomunikasyon na bumubuo ng isang output signal na phase ay may kaugnayan sa yugto ng input signal na "reference". Ito ay isang elektronikong circuit na binubuo ng isang variable na osileytor dalas at isang bahagi ng detector na ikinukumpara ang phase ng ang signal na nagmula mula sa osileytor sa isang input signal.
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